MILPRF50884F
APPENDIX A
A.3.5.6.3 Foreign material between the stiffener and printed wiring board surface. Foreign material determined to
be located between stiffener and printed wiring board surface shall be acceptable provided the bulge of non-
conductive foreign material is no larger than .004 inch (0.1 mm). The foreign material shall not be larger than 5
percent of the bonding area of the stiffener. The foreign material shall not encroach onto the land of any component
hole.
A.3.5.6.4 Stiffener access hole registration. Stiffener access hole registration shall be such that the size or
diameter of the access hole shall not reduce the component land area or minimum annular ring below the limits
specified (see A.3.5.2.1).
A.3.5.7 Via protection.
A.3.5.7.1 Filled via, cap plating (see figure F13). When the design requires the copper cap plating of filled vias
(see A.3.1.1), all vias required to be protected shall be completely covered by the cap plating. The plated copper
surface shall be planar with no indication of the filled via underneath. Visually discernable protrusions (bumps) and
depressions (dimples) in the copper plating over filled vias shall be acceptable providing they meet the requirements
of A.3.6.6. Voids in the copper cap plating over the filled portion of the via shall not be acceptable.
A.3.5.7.2 Unfilled via, solder mask tenting (see figure F14). When the design requires the tenting of solder mask
over unfilled vias (see A.3.1.1), all vias required to be protected shall be completely covered by solder mask. Voids in
the solder mask over the via exposing the hole shall not be acceptable.
A.3.5.8 Wicking of metallic conductor surface finish materials (see figure F10). Wicking of metallic conductor
surface finish materials (coatings, platings, or solder) extending .010 inch (0.25 mm) or less into the base material
shall be acceptable provided it does not reduce the conductor spacing below the minimum clearance spacing
requirements specified (see A.3.1.1). Wicking of metallic conductor surface finish materials (coatings, platings, or
solder) extending .012 inch (0.3 mm) or less under coverlayers in non-bend or flex transition areas shall be
acceptable.
A.3.6 Plated hole structural requirements. When examined by microsection, the plated holes of the
microsectioned test specimen (which includes plated-through holes, blind vias, buried vias, low aspect ratio blind
vias, and microvias) shall meet the requirements of A.3.6.1 through A.3.6.9. If not specified on the applicable master
drawing (see A.3.1.1) or herein, the requirements of A.3.3 shall be met. Barrel cracks, butt plating joints,
circumferential separations, corner cracks, and cracked copper plating shall not be acceptable. Appendix G contains
figures, illustrations, and photographs that can aid in the visualization of internally observable accept/reject conditions
of microsectioned test specimens. The thermal zones of plated hole structures are shown on figures G1 and G2.
A.3.6.1 Base material. Base materials shall be used that enable the printed wiring board to meet all of the
performance requirements of this specification. Unless otherwise specified (see A.3.1.1), the following base material
condition requirements listed in A.3.6.1.1 through A.3.6.1.8 shall apply.
A.3.6.1.1 Adhesive voids (for metal clad flexible base materials only) (see figure G1).
A.3.6.1.1.1 Non-stressed specimens (as received condition). Adhesive voids with the longest dimension of .020
inch (0.51 mm) or less shall be acceptable. Multiple adhesive voids in the same plane between adjacent plated holes
shall not have a combined length which exceeds .020 inch (0.51 mm).
A.3.6.1.1.2 Stressed specimens (after rework simulation, resistance to soldering heat, or thermal shock). After
undergoing rework simulation, resistance to soldering heat, or thermal shock testing (see A.3.7.4.8, A.3.7.6.2, and
A.3.7.6.3), adhesive voids are not evaluated in zone A. Adhesive voids in zone B with the longest dimension of .020
inch (0.51 mm) or less shall be acceptable provided the conductor spacing is not reduced below the minimum
dielectric spacing requirements specified (see A.3.1.1).
23
For Parts Inquires submit RFQ to Parts Hangar, Inc.
© Copyright 2015 Integrated Publishing, Inc.
A Service Disabled Veteran Owned Small Business