MILPRF50884F
APPENDIX A
A.4.8.4.8.2 Plated-through hole (see A.3.7.4.8.2). Rework simulation of plated-through holes shall be tested in
accordance with test method number 2.4.36 of IPCTM650. The following details shall apply:
a.
Unless otherwise specified, method A shall be used initially.
b.
For designs with an overall printed wiring board thickness greater than .120 inch (3.0 mm), one row of
plated-through holes shall be used to assure that the pre-designated method to be used for the soldering
and desoldering operation will produce satisfactory solder connections for the printed wiring board test
specimen design being tested. A satisfactory solder connection is when the wire is wetted through the entire
plated hole within the soldering time limit specified in the test method. An unsatisfactory solder connection
is when an insufficient solder connection is produced or the soldering time exceeds the limit specified in the
test method.
c.
In case of an unsatisfactory solder connection, another plated-through hole on the row shall be soldered
using the soldering temperature of the next higher method (for example, method B if method A is insufficient,
or method C if method B does not suffice) until a satisfactory solder connection is made. If the temperatures
of method C still yields unsatisfactory solder connections, consult the qualifying activity for additional
guidance before proceeding further with the testing.
d.
Once a method that produces satisfactory solder connections has been determined, the soldering and
de-soldering operation shall proceed using a different row of plated-through holes which will be evaluated to
the acceptance criteria of A.3.7.4.8 herein. The final test method used shall be noted in the test report.
A.4.8.4.9 Solderability (see A.3.7.4.9). Unless otherwise specified (see A.3.1.1), the tests that used Sn-Pb solders
(A, B, C, or D) of JSTD003 shall be used. The default category of coating durability of JSTD003 is category 2.
When specified (see A.3.1.1), accelerated conditioning for coating durability shall be in accordance with JSTD003.
For printed wiring boards using only surface mount components, the surface solderability test can be used in lieu of
the hole solderability test. For mixed component designs (both surface mount and through hole attachment), unless
otherwise specified, only the hole solderability test shall be performed.
A.4.8.4.9.1 Hole (plated-through hole) (see A.3.7.4.9.1). The printed wiring board test specimens shall be
inspected in accordance with JSTD003 or the solderability test methods test described in appendix G of
A.4.8.4.9.2 Surface or surface mount land (see A.3.7.4.9.2). The printed wiring board test specimens shall be
inspected in accordance with JSTD003 or the solderability test methods described in appendix G of
A.4.8.4.10 Solder mask cure (see A.3.7.4.10). The printed wiring board test specimens shall be inspected for
cured of solder mask in accordance A.4.8.1.
A.4.8.4.11 Surface peel strength (types 3 and 4 using foil lamination) (see A.3.7.4.11). The printed wiring board
test specimen shall be tested and inspected in accordance condition A of test method number 2.4.8 of IPCTM650.
Conditions B and C (after resistance to soldering heat and after exposure to processing chemicals) shall not be
performed. All surface finish plating or coatings (for example, plated tin-lead, solder coating, ENIG, OSP, and others)
shall be chemically removed prior to test or shall be prevented from being deposited during manufacturing. The
printed wiring board test specimen shall not be coated with any organic coating for test. No individual value in the
calculation of the average peel strength shall be less than 1.5 pounds of the specified minimum value for each inch
(0.26 N/mm) of width.
A.4.8.4.11.1 Test specimens. The printed wiring board test specimen shall be as described in appendix H.
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