MIL-DTL-62740A(AT)
4.2.3 Operating requirements verification.
4.2.3.1 Input power. To determine conformance to 3.3.1, the input current shall be
measured with an ammeter.
4.2.3.2 Output voltages.
4.2.3.2.1 12 V reference. To determine conformance to 3.3.2.1, the voltage at P1-9 and
P1-10 with respect to P1-1 shall be measured with a voltmeter. A 110 ohm, 5%, 2 watt resistor
shall be put at P1-9 and the current from the unterminated end of the resistor of P1-1 shall be
measured with an ammeter.
4.2.3.2.2 8 V reference. To determine conformance to 3.3.2.2, the voltage at P1-7 and
P1-8 with respect to P1-1 shall be measured with a voltmeter. A 70 ohm, 5%, 2 watt resistor
shall be put at P1-7 and the current from the unterminated end of the resistor to P1-1 shall be
measured with an ammeter.
4.2.3.2.3 -8 V reference. To determine conformance to 3.3.2.3, the voltage at P1-17 and
P1-18 with respect to P1-1 shall be measured with a voltmeter. A 35 ohm, 5%, 2 watt resistor
shall be put at P1-17 and the current from the unterminated end of the resistor to P1-1 shall be
measured with an ammeter.
4.2.3.3 CMOS logic levels. To determine conformance to 3.3.3, the input and output
CMOS logic levels shall be observed and verified with an oscilloscope.
4.2.3.4 Latches.
4.2.3.4.1 Output clocks. To determine conformance to 3.3.4.1, a logic analyzer shall be
used to verify that the signal at U27-4 conforms to the waveforms shown in figure 1, the signal at
U27-11 conforms to the waveforms shown in figure 2, the signal at U27-10 conforms to the
waveforms shown in figure 3, and the signal at U27-3 conforms to the waveforms shown in
figure 4.
4.2.3.4.2 Output latches. To determine conformance to 3.3.4.2, a logic analyzer shall be
used to verify that the logic levels applied to BUS 0 through BUS 7 (P1-21 through P1-28)
appear at the outputs specified in 3.3.4.2 when signals conforming to those shown in figures 1, 2,
3, and 4 are applied to the PWA.
4.2.3.5 Voltage level shifter. To determine conformance to 3.3.5, a logic level 1, shall be
applied at P1-38. A hexadecimal pattern 08 shall be applied at P1-21 through P1-28 and the
waveform of figure 2 shall be applied. A HEXAD pattern 18 shall be applied at P1-21 through
11
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