MIL-DTL-62740A(AT)
3.3.8 Divide by n+1 counter. The frequency of the signal at U9 pins 14 and 15 shall be
the frequency at U3 pin 7 divided by the sum of one and the decimal number represented by the
logic levels at U9 pins 4, 5, 6, 7, 10, and 11.
3.3.9 Interrupt and flag select. When a logic level 0 is present at U21 pins 11, 10, and 9,
the frequency of the signal at U21 pin 14 shall be the same as the frequency of the signal at U9
pins 14 and 15. The signal at U21 pin 14 shall be at P1-64 no greater than 250 ns later. When a
logic level 0 is present at U21 pins 10 and 9 and a logic level 1 is present at U21 pin 11, the
frequency of the signal at U21 pin 14 shall be the same as the frequency of the signal at U3 pin 7.
The signal at U21 pin 14 shall be at P1-64 no greater than 250 ns later.
3.3.10 Test push button debouncer. With a logic level 0 at P1-50 and P1-52 not
connected, U6 pin 3 and P1-56 shall be at logic level 0. When a logic level 0 is applied at P1-52
and P1-50 is open-circuited, U6 pin 3 and P1-56 shall change to a logic level 1 in no greater than
400 ns. When a logic level 0 is applied at P1-50 and P1-52 is open-circuited, U6 pin 3 and P1-56
shall change to a logic level 0 in no greater than 400 ns.
3.3.11 Microprocessor interrupt.
3.3.11.1 Microprocessor interrupt signal. With a logic level 1 present at U6 pin 5, a logic
level 0 shall appear at P1-62 no greater than 1050 ns after the rising edge of the signal at U6
pin 3. With a logic level 1 present at U6 pin 9, a logic level 0 shall appear at P1-62 no greater
than 1050 ns after the rising edge of the signal at U6 pin 11. A logic level 0 shall appear at P1-60
no greater than 300 ns after the rising edge of the signal at U6 pin 11.
3.3.11.2 Interrupt reset. When a logic level 1 is applied at P1-99, a logic level 1 shall
appear at P1-62 no greater than 330 ns later.
3.3.12 Ignition signal pulse shaper. The frequency of the signal at U3 pin 6 shall be the
same as the frequency of a signal applied at P1-86. The frequency can range from 2 Hertz (Hz) to
700 Hz. The rising edge of the signal at U3 pin 6 shall occur between 31.3 and
63.2 microseconds (µs) after the rising edge of the signal at P1-86. The positive pulse width of
the signal at U3 pin 6 shall be 2.5 + 0.5 milliseconds (ms).
3.4.13 Ignition kill signal. When U7 pins 2 and 5 are at logic level 1, the signal present at
U9 pins 14 and 15 shall be observed identically at P1-48. When U7 pin 2 is at logic level 0, the
signal at P1-48 shall be a logic level 1 and P1-70 shall be capable of sinking not less than 36 mA.
3.4.14 Pulse tachometer debouncer. When a 0 to 5 Vdc square wave of frequency
between 5 and 325 Hz is applied at P1-66, the frequency of the signal at U3 pin 5 shall be twice
the frequency of the applied signal and shall have a positive pulse width of 2.41 + 1.08 ms. The
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