MIL-DTL-62741A(AT)
75 ns MIN.
U7-10
H
L
0 ns MIN.
P1-21
H
THROUGH
DATA IN VALID
P1-26
L
300 ns MAX.
U1-2,
H
5,7,10,
DATA OUT VALID
15,12
L
H= LOGIC LEVEL 1
L= LOGIC LEVEL 0
FIGURE 3. Waveforms for latching data into U1.
H
75 ns MIN.
U7-4
L
0 ns MIN.
P1-21
H
THROUGH
DATA IN VALID
P1-26
L
300 ns MAX.
H
U2-15,
DATA OUT VALID
12,10,7,
L
2,5
H= LOGIC LEVEL 1
L= LOGIC LEVEL 0
FIGURE 4. Waveforms for latching data into U2.
H
P1-36
0 ns MIN.
MRD\
L
H
P1-29
IO9/1
0 ns MIN.
250 ns MAX.
L
H
U7-3
250 ns MAX.
L
H= LOGIC LEVEL 1
L= LOGIC LEVEL 0
FIGURE 5. Waveforms to generate U7-3 clock.
18
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