MIL-PRF-31032/1B
3.6.7 Etchback (when specified, see 3.1). When specified, printed boards shall be etched back for the lateral
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removal of base material (resin, reinforcement material, etc.) from the internal conductors prior to plating. The
etchback shall be effective on at least the top or bottom surface of each internal conductor. Negative etchback is not
acceptable when etchback is specified.
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3.6.7.1 Etchback limits. Unless otherwise specified, the etchback shall be 0.005 mm (.0002 inch) minimum and
0.076 mm (.0030 inch) maximum when measured at the internal copper contact area protrusion.
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3.6.8 Smear removal. The plated hole internal conductors shall be cleaned to be free of resin smear. When
etchback is not specified, a negative etchback of 0.013 mm (.0005 inch) maximum shall be acceptable.
3.6.9 Conductive interface separations. Except for along the vertical edge of the external copper foil, there shall be
no separations or contamination between the hole wall conductive interfaces. Conductive interface separations along
the vertical edge of the external copper foil shall be acceptable. Anomalies resulting from this separation shall not be
cause for rejection.
NOTE: The term conductive interfaces shall be used to describe the junction between the hole wall plating or coating
and the surfaces of internal and external layers of copper or metal foil. The interface between platings and coating
(electroless copper, direct metallization copper, and non-electroless electroless copper substitutes, etc., and
electrolytic copper, whether panel or pattern plated) shall also be considered a conductive interface.
3.6.10 Laminate voids. Laminate voids with the longest dimension of 0.08 mm (.003 inch) or less shall be
acceptable provided the conductor spacing is not reduced below the minimum dielectric spacing requirements,
laterally or vertically, as specified. After undergoing rework simulation (see 3.7.4.5), thermal stress (see 3.7.6.2) or
thermal shock (see 3.7.6.3), laminate voids are not evaluated in zone A (see figure 1).
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3.6.11 Lifted lands (after thermal stress, rework simulation, or thermal shock). After undergoing rework simulation
(see 3.7.4.5), thermal stress (see 3.7.6.2) or thermal shock (see 3.7.6.3), the maximum allowed lifted land distance
from the printed board surface plane to the outer lower edge of the land shall be the thickness (height) of the terminal
area or land. The completed, non-stressed printed board shall not exhibit any lifted lands.
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3.7 Performance requirements. The performance requirements specified in 3.7.1 through 3.7.6.3 shall be verified
by the test methods detailed in 4.7. Unless otherwise specified by the Technical Review Board (TRB), test
optimization in accordance with MIL-PRF-31032 may be used, but the printed boards shall meet all of the
performance requirements specified and herein, regardless of the verification method used.
3.7.1 Acceptability (of printed boards). When examined as specified in 4.7.1, the printed boards shall conform to
the acceptance requirements specified in 3.3 (design), 3.4 (material), 3.5 (external visual and dimensional), 3.8
(marking), and 3.9 (workmanship), inclusive.
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3.7.2 Microsection evaluation (of printed board test specimens). When printed board test specimens (completed
printed boards, supporting test coupons, or qualification test specimens) are microsectioned and examined as
specified in 4.7.2, the requirements specified in 3.6 shall be met.
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