MILPRF55110G
APPENDIX A
A.4.8.2.2
A.4.8.2.2 Microsection examination and inspection. Microsection examination and inspection shall be
accomplished in accordance with test method number 2.2.5 of IPC-TM-650 to evaluate characteristics such as
dielectric spacing, etchback, plating thickness, foil thickness, etc., in plated holes. If more than three plated holes are
on a test specimen, all holes shall be evaluated. The following details shall apply:
a.
Magnifications. Unless otherwise specified in test method number 2.2.5 of IPC-TM-650, the test specimens
shall be inspected at a magnification of 100X ±5 percent. Referee inspections shall be accomplished at a
magnification of 200X ±5 percent.
b.
Evaluations. Pre and post microetch evaluations for the criteria of A.3.6 shall be accomplished at
magnifications specified above. The specimens shall be evaluated for plating separations, superfulous copper,
and wicking prior to microetching (see A.6.11)
c.
Measurements. Measurements shall be averaged from at least three determinations for each side of the
plated hole. Isolated thick or thin sections shall not be used for averaging; however, isolated areas of reduced
copper thickness shall be measured and evaluated to the copper plating void rejection criteria specified in
A.3.6.9.3.1.
A.4.8.2.3
A.4.8.2.3 Plated hole inspection (see A.3.6). When plated holes are inspected in accordance with A.4.8.2.2, the
following details shall apply:
Annular ring (internal) (see A.3.6.1). The measurement of the annular ring on internal layers is from the inside
a.
drilled surface (within the hole) of the plated hole or unsupported hole to the outer edge of land (see figure
A-5). This measurement shall apply to all internal lands for all three holes.
Dielectric layer thickness (see A.3.6.4). The dielectric layer thickness shall be inspected between all conductor
b.
layers present in the test specimen.
c.
Metal foil thickness (see A.3.6.2). The external and internal metal foil thickness shall be inspected on all
conductor layers present in the test specimen.
Plating and coating thickness (see A.3.6.9). Isolated thick or thin sections shall not be used for averaging.
d.
However, isolated areas of reduced copper thickness shall be measured for compliance with the requirements
of A.3.6.9.
e.
Copper plating voids (see A.3.6.9.3.1). Any plated hole in the microsection failing the plating void criteria of
A.3.6.9.3.1 subparagraphs a, b, or c, shall be cause for the entire panel of printed wiring boards associated
with the microsection to be rejected. The following details apply if a single plating void is found:
(1)
Type 2: If the plating void does not exceed the conditions of A.3.6.9.3.1, the entire lot (100-percent panel
inspection) shall have test specimens from each panel microsectioned and inspected for voids. If a
plating void is present in any microsection mount representing a panel, a referee microsection shall be
performed using an A or B test coupon from the opposite corner of that panel. If the referee has no
plating voids, that panel is acceptable, however, if a plating void is present in that microsection, that
panel of printed wiring boards shall be rejected.
Type 3: If the plating void does not exceed the conditions of A.3.6.9.3.1, a referee microsection shall be
(2)
performed using an A or B test coupon from the opposite corner of the panel. If the referee has no
plating voids, the panel is acceptable, however, if a plating void is present in that microsection, that panel
of printed wiring boards shall be rejected.
Heatsink planes (see A.3.6.4.1 and figure A7). The lateral dielectric spacing between the heatsink planes
f.
and adjacent conducting surfaces, nonfunctional lands, or plated-through holes shall be measured at the
closest point between these surfaces.
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