MILPRF55110G
APPENDIX A
A.3.6.5
A.3.6.5 Delamination. Printed wiring boards shall have no delaminations in excess of that allowed in A.3.5.1.3.
A.3.6.6
A.3.6.6 Etchback or smear removal (type 3).
A.3.6.6.1
A.3.6.6.1 Etchback (when specified, see A.3.1.1) (see figures A8 and A9). When specified (see A.3.1.1), printed
wiring boards shall be etched back for the lateral removal of resin and reinforcement material (woven glass or other
media) from the internal conductors prior to plating. Unless otherwise specified (see A.3.1.1), etchback shall be a
minimum of.0002 inch (0.005 mm) and no greater than the specified minimum internal annular ring or .002 inch (0.05
mm), whichever is less, with a preferred depth of .0005 inch (0.013 mm) when measured at the internal copper
contact area protrusion (see figure A8). The etchback shall be effective on at least the top or bottom (or both)
surface of each internal conductor to provide at least a two (2) point contact with the subsequent hole plating (see
figure A9). Negative etchback is not acceptable when etchback is specified. Wicking shall meet the requirements of
A.3.6.6.2
A.3.6.6.2 Smear removal (hole cleaning) (see figure A8). When etchback is not specified (see A.3.1.1), the
vertical faces of the internal conductors of the plated-through hole shall be cleaned to be free of resin smear. Lateral
removal of base material from the hole wall shall not exceed .001 inch (0.03 mm). When etchback is not specified
(see A.3.1.1), a negative etchback of .0005 inch (0.013 mm) maximum shall be acceptable.
A.3.6.6.3
A.3.6.6.3 Wicking (see figure A10). Wicking of copper plating extending .003 inch (0.08 mm) into the base
material shall be acceptable provided it does not reduce the conductor spacing below the minimum clearance spacing
requirements specified (see A.3.1.1).
A.3.6.7
A.3.6.7 Laminate (base material) voids. Laminates cracks shall be considered and treated as laminate voids.
A.3.6.7.1
A.3.6.7.1 As received condition. Laminate voids with the longest dimension of .003 inch (0.08 mm) or less shall be
acceptable.
A.3.6.7.2
A.3.6.7.2 After rework simulation, thermal shock or thermal stress testing (see figure A11). Laminate voids are
not evaluated in zone A (the thermal zone of stressed plated holes of figure A11). Laminate voids in zone B (the
laminate evaluation area of stressed plated holes of figure A11) with the longest dimension of .003 inch (0.08 mm) or
less shall be acceptable provided the conductor spacing is not reduced below the minimum dielectric spacing
requirements, laterally or vertically, as specified (see A.3.1.1).
A.3.6.8
A.3.6.8 Lifted lands (see figure A12).
A.3.6.8.1
A.3.6.8.1 As received condition. There shall be no lifted lands on the as received specimen. When inspected in
accordance with A.4.8.2 and lifted lands are present, the lot shall be 100 percent visually inspected in accordance
with A.4.8.1 for separation of the lands from the base material.
A.3.6.8.2
A.3.6.8.2 After rework simulation, thermal stress or thermal shock testing. After undergoing rework simulation,
thermal stress, or thermal shock testing (see A.3.7.4.4, A.3.7.4.8, and A.3.7.6.2), the maximum allowed distance from
the plane of the base material surface to the bottom of the edge of the land or pad shall be no greater than the total
land thickness. The total land thickness is equal to the combined thickness of the metal foil and copper plating on
that land.
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