MIL-DTL-62736A(AT)
3.3.8.5 UART register selection. UART registers shall be selected by latching the data in
table XIII into U9 using the timing diagram of figure 2.
TABLE XIII. Data to select UART register.
Read or
P1-
Register
Load
P1-36
28
27
26
25
24
23
22
21
Transmitter holding
Load
0
X
X
X
0
0
0
1
0
Control
Load
0
X
X
X
1
0
0
1
0
Receiver holding
Read
1
X
X
X
0
0
0
1
0
Status
Read
1
X
X
X
1
0
0
1
0
3.3.8.6 Control or transmitter holding register load. After selecting the control or
transmitter holding register by the method of 3.3.8.5, these registers shall be loaded by applying
the waveforms in figure 6.
3.3.8.7 RS-485 serial data out. The UART shall send out serial data by RS-485
communications protocol. Each RS-485 logic level 1 shall be a difference of no less than
+0.2 Vdc but no greater than +12 Vdc between the U14 pins 5 and 9 and U14 pins 4 and 16.
Each RS-485 logic level 0 shall be a difference of no greater than -0.2 Vdc but no less than
-12 Vdc between U14 pins 5 and 9 and U14 pins 4 and 16. The voltage between U14 pins 5,
9 and P1-1, P1-2, P1-3, and P1-4 magnitude shall be less than + 12 Vdc.
3.3.8.8 Data formats. The UART shall transmit and receive data with the formats shown
in table XIV. After the UART control register has been selected, each format shall be initialized
in the UART by applying the waveforms of figure 6.
TABLE XIV. Control register data for UART formats.
Format
P1-
Data Bits Stop Bits
28
27
26
25
24
23
22
21
7
1
0
0
0
1
0
0
1
0
8
1
0
0
0
1
1
0
1
0
3.3.8.9 Communications protocol select. After applying the waveforms of figure 2 with
the fourth set of logic levels in table V, RS-232-C or RS-485 communications formats shall be
selected by applying the waveforms in figure 5 to latch the data from the table XV into U12.
TABLE XV. Communications protocol select data.
P1-
Communications
28
27
26
25
24
23
22
21
Protocol
X
X
X
X
X
X
0
1
None
X
X
X
X
X
X
1
0
RS-232-C
X
X
X
X
X
X
1
1
RS-485
(X denotes a don't care condition)
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