MIL-DTL-62736A(AT)
4.2.3.2 Logic levels.
4.2.3.2.1 CMOS Logic levels. To determine conformance to 3.3.2.1, the input and
output CMOS logic levels shall be observed and verified with an oscilloscope.
4.2.3.2.2 TTL logic levels. To determine conformance to 3.3.2.2, the input and output
TTL logic levels shall be observed and verified with an oscilloscope.
4.2.3.3 Input isolation.
4.2.3.3.1 Data BUS isolation. To determine conformance to 3.3.3.1:
a. Connect a 10K (where K = 1000) + 10% ohm resistor to each of the bus board
pins (P1-21 through P1-28). Terminate each of the 10 Kohm resistors with a
20K + 10% ohm resistor to 5.00 V.
b. Apply 5.00 V to the connection between the 10 Kohm and the 20 Kohm resistors
(the test input) connected to P1-21. Apply 0.00 V to the other seven test inputs.
Verify that the voltage at P1-21 is not less than 4.5 V and the voltages at the other
seven bus board pins are not more than 0.5 V.
c. Repeat part b for the seven remaining board pins P1-22 through P1-28.
4.2.3.3.2 J3-T, J3-U, IOF/7, MRD/, OEN-Q/, Q, CLEAR/, and TPB isolation. To
determine conformance to 3.3.3.2.
a. Connect a 10K + 10% ohm resistor to each of the board pins P1-11, P1-15, P1-35
through P1-38, P1-57, and P1-66.
b. Apply 5.00 V to the unterminated end (the test input) of the 10 Kohm resistor
connected to P1-11. Apply 0.00 V to the other eight test inputs. (See 3.3.3.2 for
proper P1-62 measurement.)
c. Verify that the voltage at P1-11 is not less than 4.5 V and the voltages at the other
seven test inputs are not more than 0.5 V.
d. Repeat parts b and c for P1-15, P1-35 through P1-38, P1-57, and P1-66.
(See 3.3.3.2 for proper P1-62 measurement.)
4.2.3.4 DCA/-15 Vdc source. To determine conformance to 3.3.4, apply voltages in the
range of +0.40 Vdc to 32.00 Vdc to P1-42. Observe the voltages at P1-19 and P1-20.
4.2.3.5 Reset.
4.2.3.5.1 Power-up reset. To determine conformance to figure 1 and 3.3.5.1, apply
+5 Vdc to P1-5 and P1-6 and observe the voltage at P1-68, U1 pin 21, U2 pin 2, U3 pin 2,
U9 pin 1, U12 pin 13, and U20 pin 6.
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